View SQ3419EEV-T1-GE3_3951986.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

sq3419eev www.vishay.com vishay siliconix s11-2124-rev. b, 07-nov-11 1 document number: 66714 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 automotive p-channel 40 v (d-s) 175 c mosfet features ? halogen-free according to iec 61249-2-21 definition ?trenchfet ? power mosfet ? aec-q101 qualified d ?100 % r g and uis tested ? typical esd protection 800 v ? compliant to rohs directive 2002/95/ec notes a. package limited. b. pulse test; pulse width ? 300 s, duty cycle ? 2 %. c. when mounted on 1" squa re pcb (fr-4 material). d. parametric verification ongoing. product summary v ds (v) - 40 r ds(on) ( ? ) at v gs = - 10 v 0.050 r ds(on) ( ? ) at v gs = - 4.5 v 0.078 i d (a) - 7.4 configuration single p-channel mosfet (4) s (1, 2, 5, 6) d (3) g tsop-6 top v iew 6 4 1 2 3 5 2.85 mm 3 mm marking code: 8cxxx ordering information package tsop-6 lead (pb)-free and halo gen-free SQ3419EEV-T1-GE3 absolute maximum ratings (t c = 25 c, unless otherwise noted) parameter symbol limit unit drain-source voltage v ds - 40 v gate-source voltage v gs 12 continuous drain current t c = 25 c i d - 7.4 a t c = 125 c - 4.3 continuous source curr ent (diode conduction) a i s - 6.3 pulsed drain current i dm - 29 single pulse avalanche current l = 0.1 mh i as - 20 single pulse avalanche energy e as 20 mj maximum power dissipation b t c = 25 c p d 5 w t c = 125 c 1.6 operating junction and storage temperature range t j , t stg - 55 to + 175 c thermal resistance ratings parameter symbol limit unit junction-to-ambient pcb mount c r thja 110 c/w junction-to-foot (drain) r thjf 30
sq3419eev www.vishay.com vishay siliconix s11-2124-rev. b, 07-nov-11 2 document number: 66714 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes a. pulse test; pulse width ? 300 s, duty cycle ? 2 %. b. guaranteed by design , not subject to production testing. c. independent of operating temperature. stresses beyond those listed under absolute maximum ratings ma y cause permanent damage to th e device. these are stress rating s only, and functional operation of the device at these or any other condit ions beyond those indicated in the operatio nal sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended pe riods may affect device reliability. specifications (t c = 25 c, unless otherwise noted) parameter symbol test condi tions min. typ. max. unit static drain-source breakdown voltage v ds v gs = 0 v, i d = - 250 a - 40 - - v gate-source threshold voltage v gs(th) v ds = v gs , i d = - 250 a - 1.5 - - 2.5 gate-source leakage i gss v ds = 0 v, v gs = 12 v - - 2000 na zero gate voltage drain current i dss v gs = 0 v v ds = - 40 v - - - 1 a v gs = 0 v v ds = - 40 v, t j = 125 c - - - 50 v gs = 0 v v ds = - 40 v, t j = 175 c - - - 150 on-state drain current a i d(on) v gs = - 10 v v ds ? = ? - 5 v - 10 - - a drain-source on-state resistance a r ds(on) v gs = - 10 v i d = - 2.5 a - 0.041 0.050 ? v gs = - 4.5 v i d = - 2 a - 0.065 0.078 forward transconductance b g fs v ds = - 15 v, i d = - 4 a - 10 - s dynamic b input capacitance c iss v gs = 0 v v ds = - 20 v, f = 1 mhz - 850 1065 pf output capacitance c oss - 140 175 reverse transfer capacitance c rss - 95 120 total gate charge c q g v gs = - 4.5 v v ds = - 20 v, i d = - 4 a -1015 nc gate-source charge c q gs -2.8- gate-drain charge c q gd -4.7- gate resistance r g f = 1 mhz 2 7 12 ? turn-on delay time c t d(on) v dd = - 20 v, r l = 5 ? i d ? - 4 a, v gen = - 10 v, r g = 1 ? -914 ns rise time c t r -812 turn-off delay time c t d(off) -2639 fall time c t f -1015 source-drain diode ratings and characteristics b pulsed current a i sm --- 29a forward voltage v sd i f = - 1.6 a, v gs = 0 v - - 0.75 - 1.1 v
sq3419eev www.vishay.com vishay siliconix s11-2124-rev. b, 07-nov-11 3 document number: 66714 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (t a = 25 c, unless otherwise noted) gate current vs. gate-source voltage output characteristics transconductance gate current vs. ga te-source voltage transfer characteristics on-resistance vs. drain current v gs - gate-to-source v oltage ( v ) - gate current (ma) i gss 0 0.001 0.002 0.003 0.004 0.005 0 5 10 15 20 25 t j = 25 c 0 6 12 18 24 30 0246810 v gs =10vthru6v v gs =5v v d s - drain-to- s ource voltage (v) i d - drain current (a) v gs =4v v gs =3v 0 3 6 9 12 15 0246810 i d - drain current (a) - tran s conductance ( s ) g f s t c = 125 c t c = 25 c t c = - 55 c v gs - gate-to-source v oltage ( v ) - gate current (a) i gss 10 -10 10 - 8 10 -6 10 -4 10 -2 10 -0 0 5 10 15 20 25 t j = 150 c t j = 25 c 10 -9 10 -7 10 -5 10 -3 10 -1 0 6 12 18 24 30 0246810 t c = 25 c t c = 125 c t c = - 55 c v gs - g ate-to- s ource voltage (v) i d - drain current (a) 0.00 0.03 0.06 0.09 0.12 0.15 0 6 12 18 24 30 v gs =10v v gs =4.5v r d s (on) - on-re s i s tance ( ) i d - drain current (a)
sq3419eev www.vishay.com vishay siliconix s11-2124-rev. b, 07-nov-11 4 document number: 66714 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (t a = 25 c, unless otherwise noted) capacitance on-resistance vs. junction temperature on-resistance vs. gate-source voltage gate charge source-drain diod e forward voltage threshold voltage c r ss 0 200 400 600 800 1000 1200 1400 010203040 c i ss c o ss v d s - drain-to- s ource voltage (v) c - capacitance (pf) 0.5 0.8 1.1 1.4 1.7 2.0 - 50 - 25 0 25 50 75 100 125 150 175 i d =5a v gs =10v v gs =4.5v t j - junction temperature (c) (normalized) r d s (on) - on-re s i s tance 0 0.04 0.08 0.12 0.16 0.20 0246810 t j = 25 c t j = 150 c r d s (on) - on-re s i s tance ( ) v gs - g ate-to- s ource voltage (v) 0 1 2 3 4 5 6 0 3 6 9 12 15 i d =4a v d s =20v q g - total g ate charge (nc) v gs - g ate-to- s ource voltage (v) 0 0.2 0.4 0.6 0.8 1.0 1.2 1 0.01 0.001 0.1 10 100 t j = 25 c t j = 150 c v s d - s ource-to-drain voltage (v) i s - s ource current (a) - 0.5 - 0.2 0.1 0.4 0.7 1.0 - 50 - 25 0 25 50 75 100 125 150 175 i d =5ma i d = 250 a v gs (th) variance (v) t j - temperature (c)
sq3419eev www.vishay.com vishay siliconix s11-2124-rev. b, 07-nov-11 5 document number: 66714 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (t a = 25 c, unless otherwise noted) drain source breakdown vs . junction temperature thermal ratings (t a = 25 c, unless otherwise noted) safe operating area - 55 - 50 - 25 25 75 125 0 50 100 175 150 - 52 - 46 - 49 - 43 - 40 v d s - drain-to- s ource voltage (v) t j - junction temperature (c) i d = 1 ma 0.01 0.1 1 10 0.01 0.1 1 10 100 v d s - drain-to- s ource voltage (v) * v gs > minimum v gs at which r d s (on) i s s pecied i d - drain current (a) t c = 25 c single pulse b v dss limited 100 ms 1 s, 10 s, dc limited by r * ds(on) i dm limited 10 ms 1 ms 100 s
sq3419eev www.vishay.com vishay siliconix s11-2124-rev. b, 07-nov-11 6 document number: 66714 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 thermal ratings (t a = 25 c, unless otherwise noted) normalized thermal transient impedance, junction-to-ambient normalized thermal transient impedance, junction-to-foot note ? the characteristics shown in the two graphs - normalized transient thermal impedance junction-to-ambient (25 c) - normalized transient thermal impedance junction-to-foot (25 c) are given for general guidelines only to enable the user to get a ball park indication of part capabilities. the data are ext racted from single pulse transient thermal impedance characteristics which are developed from empirical measurements. the latter is valid for the part mounted on printed circuit board - fr4, size 1" x 1" x 0.062", double sided with 2 oz . copper, 100 % on both sides. the part ca pabilities can widely vary depending on actual application parameters and operating conditions. vishay siliconix maintains worldwide manufactu ring capability. products may be manufact ured at one of seve ral qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?66714 . 10 - 3 10 - 2 1 10 600 10 - 1 10 - 4 100 2 1 0.1 0.01 0.2 0.1 0.05 0.02 single p u lse d u ty cycle = 0.5 sq u are wave p u lse d u ration (s) normalized eff ective transient thermal impedance 1. d u ty cycle, d = 2. per unit base = r thja = 110 c/w 3. t jm - t a = p dm z thja (t) t 1 t 2 t 1 t 2 notes: 4. s u rface mo u nted p dm 10 - 3 10 - 2 110 10 - 1 10 - 4 2 1 0.1 0.01 0.2 0.1 0.05 0.02 single p u lse d u ty cycle = 0.5 sq u are wave p u lse d u ration (s) normalized ef fective transient thermal impedance
vishay siliconix package information document number: 71200 18-dec-06 www.vishay.com 1 1 2 3 g au ge pl a ne l 5 4 r r c 0.15 m b a b c 0.0 8 0.17 ref s e a ting pl a ne -c- s e a ting pl a ne a 1 a 2 a -a- d -b- e 1 e l 2 (l 1 ) c 4x 1 4x 1 e e1 1 2 3 6 5 4 c 0.15 m b a b -b- e 1 e e e1 5-lead tsop 6-lead tsop tsop: 5/6?lead jedec part number: mo-193c millimeters inches dim min nom max min nom max a 0.91 - 1.10 0.036 - 0.043 a 1 0.01 - 0.10 0.0004 - 0.004 a 2 0.90 - 1.00 0.035 0.03 8 0.039 b 0.30 0.32 0.45 0.012 0.013 0.01 8 c 0.10 0.15 0.20 0.004 0.006 0.00 8 d 2.95 3.05 3.10 0.116 0.120 0.122 e 2.70 2. 8 5 2.9 8 0.106 0.112 0.117 e 1 1.55 1.65 1.70 0.061 0.065 0.067 e 0.95 b s c 0.0374 b s c e 1 1. 8 0 1.90 2.00 0.071 0.075 0.079 l 0.32 - 0.50 0.012 - 0.020 l 1 0.60 ref 0.024 ref l 2 0.25 b s c 0.010 b s c r 0.10 - - 0.004 - - 0 4 8 0 4 8 1 7 nom 7 nom ecn: c-06593-rev. i, 1 8 -dec-06 dwg: 5540
an823 vishay siliconix document number: 71743 27-feb-04 www.vishay.com 1 mounting little foot tsop-6 power mosfets surface mounted power mosfet packaging has been based on integrated circuit and small signal packages. those packages have been modified to provide the improvements in heat transfer required by power mosfets. le adframe materials and design, molding compounds, and die attach materials have been changed. what has remained the same is the footprint of the packages. the basis of the pad design for surface mounted power mosfet is the basic footprint for the package. for the tsop-6 package outline drawing see http://www.vishay.com/doc?71200 and see http://www.vishay.com/doc?72610 for the minimum pad footprint. in converting the footprint to th e pad set for a power mosfet, you must remember that not only do you want to make electrical connection to the package, but you must made thermal connection and provide a means to draw heat from the package, and move it away from the package. in the case of the tsop-6 package, the electrical connections are very simple. pins 1, 2, 5, and 6 are the drain of the mosfet and are connected together. for a small signal device or integrated circuit, typical connections would be made with traces that are 0.020 inches wide. since the drain pins serve the additional function of providing the thermal connection to the package, this level of connection is inadequate. the total cross section of the copper may be adequate to carry the current required for the application, but it presents a large thermal impedance. also, heat spreads in a circular fashion from the heat source. in this case the drain pins are the heat sources when looking at heat spread on the pc board. figure 1 shows the copper spreading recommended footprint for the tsop-6 package. this pattern shows the starting point for utilizing the board area available for the heat spreading copper. to create this pattern, a plane of copp er overlays the basic pattern on pins 1,2,5, and 6. the copper plane connects the drain pins electrically, but more importantly provides planar copper to draw heat from the drain leads and star t the process of spreading the heat so it can be dissipated into th e ambient air. notice that the planar copper is shaped like a ?t? to move heat away from the drain leads in all directions. this pattern uses all the available area underneath the body for this purpose. figure 1. recommended copper spreading footprint 0.049 1.25 0.010 0.25 0.014 0.35 0.074 1.875 0.122 3.1 0.026 0.65 0.167 4.25 0.049 1.25 since surface mounted packages are small, and reflow soldering is the most common form of soldering for surface mount components, ?thermal? connections from the planar copper to the pads have not been used. even if additional planar copper area is used, there should be no problems in the soldering process. the actual solder connections are defined by the solder mask openings. by combining the basic footprint with the copper plane on the drain pins, the solder mask generation occurs automatically. a final item to keep in mind is the width of the power traces. the absolute minimum power trace width must be determined by the amount of current it has to carry. for thermal reasons, this minimum width should be at least 0.020 inches. the use of wide traces connected to the drain plane provides a low impedance path for heat to move away from the device. reflow soldering vishay siliconix surface-mount packages meet solder reflow reliability requirements. devices are subjected to solder reflow as a test preconditioning and are then reliability-tested using temperature cycle, bias humidity, hast, or pressure pot. the solder reflow temperature profile used, and the temperatures and time duration, are shown in figures 2 and 3. ramp-up rate +6 c/second maximum temperature @ 155 15 c 120 seconds maximum temperature above 180 c 70 ? 180 seconds maximum t emperature 240 +5/ ? 0 c time at maximum t emperature 20 ? 40 seconds ramp-down rate +6 c/second maximum figure 2. solder reflow temperature profile
an823 vishay siliconix www.vishay.com 2 document number: 71743 27-feb-04 255 ? 260 c 1 4 c/s (max) 3-6 c/s (max) 10 s (max) reflow zone pre-heating zone 3 c/s (max) 140 ? 170 c maximum peak temperature at 240 c is allowed. figure 3. solder reflow temperature and time durations 60-120 s (min) 217 c 60 s (max) thermal performance a basic measure of a device?s thermal performance is the junction-to-case thermal resistance, r jc , or the junction-to-foot thermal resistance, r jf . this parameter is measured for the device mounted to an infinite heat sink and is therefore a characterization of the device only, in other words, independent of the properties of the object to which the device is mounted. table 1 shows the thermal performance of the tsop-6. table 1. equivalent steady state performance?tsop-6 thermal resistance r jf 30 c/w system and electrical impact of tsop-6 in any design, one must take into account the change in mosfet r ds(on) with temperature (figure 4). 0.6 0.8 1.0 1.2 1.4 1.6 ? 50 ? 25 0 25 50 75 100 125 150 v gs = 4.5 v i d = 6.1 a on-resistance vs. junction temperature t j ? junction temperature ( c) figure 4. si3434dv r ds(on) ? on-resiistance (normalized)
application note 826 vishay siliconix www.vishay.com document number: 72610 26 revision: 21-jan-08 application note recommended minimum pads for tsop-6 0.119 (3.023) recommended mi nimum pads dimensions in inches/(mm) 0.099 (2.510) 0.064 (1.626) 0.028 (0.699) 0.039 (1.001) 0.020 (0.508) 0.019 (0.493) return to index return to index
document number: 91 000 www.vishay.com revision: 11-mar-11 1 disclaimer legal disclaimer notice vishay all product, product specifications and data ar e subject to change without notice to improve reliability, function or design or otherwise. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectivel y, vishay), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. to the maximum extent permitted by applicab le law, vishay disc laims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, incl uding without limitation specia l, consequential or incidental dama ges, and (iii) any and all impl ied warranties, including warran ties of fitness for particular purpose, non-infringement and merchantability. statements regarding the suitability of pro ducts for certain types of applications are based on vishays knowledge of typical requirements that are often placed on vishay products in gene ric applications. such statements are not binding statements about the suitability of products for a partic ular application. it is the customers responsibility to validate that a particu lar product with the properties described in th e product specification is su itable for use in a particul ar application. parameters provided in datasheets an d/or specifications may vary in different applications and perfo rmance may vary over time. all operating parameters, including typical pa rameters, must be validated for each customer application by the customers technical experts. product specifications do not expand or otherwise modify vishays term s and conditions of purchase, including but not limited to the warranty expressed therein. except as expressly indicated in writing, vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the vishay product co uld result in person al injury or death. customers using or selling vishay products not expressly indicated for use in such applications do so at their own risk and agr ee to fully indemnify and hold vishay and it s distributors harmless from and against an y and all claims, liabilities, expenses and damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that vis hay or its distributor was negligent regarding the design or manufact ure of the part. please contact authorized vishay personnel t o obtain written terms and conditions regarding products designed fo r such applications. no license, express or implied, by estoppel or otherwise, to any intelle ctual property rights is gran ted by this document or by any conduct of vishay. product names and markings noted herein may be trademarks of their respective owners.

▲Up To Search▲

Price & Availability of SQ3419EEV-T1-GE3

	To Download SQ3419EEV-T1-GE3 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .